Pat Garvin, one of the engineers responsible for the hardware design for the video option on the Cerent 454, has one such story to tell. It remains a moment frozen in time, fraught with misleading promises from one supplier, tensions created by deadlines, and enough drama to produce extreme stress.
“I will never forget the video project,” Pat recalls. “Even though it never became a sellable product, it made for much drama.”
Cerent’s Hardware Engineers Attempt to Develop Video as a Multi-service Interface (for the Cerent 454)
Early in the project, Pat consulted with Grant Moulton on the DSP  aspects of the video design: “We had to digitally sample a 6 MHz-wide [video] channel centered around 43 MHz and then down-convert it to baseband. From there, it would be framed and loaded onto an STS-3c payload [2,3].”
This step in the process sought to transmit a video signal digitally over a SONET infrastructure for the cable operators. Pat adds, “On the other side of the optical link, we had to recreate the video signal and up-convert it back to 43 MHz.”
He notes, “This was no easy trick. The digital logic for this had to run at 108 MHz. At that time, [around 1999], FPGA technology was not that great. We typically ran designs at 77 MHz. Running at 108 MHz was pushing the envelope.”
Grant, in 2017, points out, “Programming something in hardware or software, to run at a certain speed, is probably the hardest task in the DSP field.”
Cerent’s Vendor Partners
Both Xilinx and Altera had new FPGA families just hitting the market around the time Cerent’s video project started. Pat remembers the situation, “All FPGA designers at Cerent had used Xilinx exclusively up to that point. However, Xilinx did not have a digital filter compiler (we were using FIR filters ) that worked with their new family. Altera, on the other hand, did have a working compiler so I chose one of their FPGAs.”
Around this time John Proctor was hired to design the DSP logic for the video project.
Pat recalls, “John started working with an Altera field applications engineer to learn and use their FIR compiler. After some time, he built the filters and proceeded to simulate them.”
But something strange happened, so John went to Pat and told him that the filters that needed to run at 108 MHz would only run at around 1 MHz.
“The reason for this,” Pat recalls, “was that Altera's FIR compiler was creating un-optimized structures. Altera  promised to fix this issue but I was worried they would not deliver. At this point, we had already built a board with the Altera FPGA on it. We were stuck.”
Xilinx to the Rescue
“I had worked with Xilinx  for decades and knew many people in the company,” Pat says. “After one sleepless night, I decided to give them a call and explained the issue. They were excited about the possibility of booting Altera from Cerent.”
Xilinx sent two engineering experts to meet with Pat and Cerent’s video development team. He notes, “Together, we came up with a scheme where we would purchase a Xilinx development board and attach it to our prototype board (thereby, bypassing the Altera FPGA completely). One of the Xilinx engineers was a DSP expert and the other was a routing expert (this insured that we could create the most optimized and thus fastest design possible). They didn't have a FIR compiler, but they promised to build the required filters by hand.”
Pat now had a plan A and a plan B. Eventually, it leaked out to Altera that Cerent was also working with Xilinx in parallel. Pat recalls, “That did not go over well with Altera’s salesperson. She whined but she assured me it would be a fight to the finish, assuring me Altera would win.”
A short time after Pat instituted his plan B, Carl Russo, Cerent’s CEO came calling to see how the project was progressing, the type of visit Carl regularly conducted with all of his departments.
Pat was blunt, “I told Carl we had problems with Altera but that I had brought Xilinx in as a plan B.” Pat paused and chuckled, “I think it was this move that saved me from getting Carl's sneaker up my backside.”
Pat recounts that harrowing time, “I remember our video source, a DVD player, died the night before the lab demo. I had to run to The Good Guys  and purchase a new player. But that was typical of the ongoing drama on this project. The good news though, was that we were able to show Cablevision that we could pass video, albeit a bit noisy. But that became a new challenge for us.”
“As for the Altera salesperson,” Pat felt, “she had this chip on her shoulder [no pun intended]. She felt I wasn't giving Altera a chance because I favored Xilinx.”
Pat paused, “I did favor Xilinx, but I stuck my neck out and built a board with Altera’s FPGA on it. She was starting to piss me off with her comments, so I mentioned her comments to Carl and he had a fit.”
After the whole FPGA debacle, Altera sent a team of around ten people to interview Pat as a post mortem [9,10]. “They wanted to know how they failed,” Pat adds. “The salesperson was there too and she acted very friendly. I told them that they wasted their time coming to Petaluma for a post-mortem. It was as simple as Xilinx delivering and Altera not. I can't understand how businesses survive without knowing that.”
“Altera never delivered,” Pat bluntly summarizes. “Xilinx did. I've never stopped using them in designs since.”
“When I told Xilinx the video project probably wouldn’t become a reality,” Pat observes, “they said they didn’t care. All that mattered to them was that they kept Altera out of Cerent. But truth be told, Xilinx was and still remains a high quality company. I work for Nokia (through the Alcatel-Lucent acquisition) now. I still use their parts and have no desire to migrate elsewhere.”
 DSP stands for Digital Signal Processing. As Martin Rowe at EE Times tells us, “Every analog and digital signal has some amount of noise and distortion. It's just a way of life. The trick is to keep noise and distortion low enough so that your circuits and systems will always work.”
 STS-3c is the electrical equivalent (Synchronous Transport Signal) to the SONET standard OC-3c (Optical Carrier-3, concatenated), which operates at 155 Mb/s. The small “c” signifies that the signal is concatenated. This simply means that three STS-1 frames are “pasted together” to create a single, continuous, larger frame.
 Because bandwidth was becoming so cheap, the need to compress broadcast quality video into a 45 Mb/s DS3 chunk of bandwidth was not critical to the economic equation as it once was. The Cerent team chose to contain the baseband video signal inside a 150 Mb/s STS-3c chunk of bandwidth. See also note  below.
 FIR stands for Finite Impulse Response, a filter in the realm of digital signal processing whose impulse response is of a finite duration.
 Could there have been a culture of “playing loose with the facts” at Altera? It was reported in June 2006 that Altera’s CFO resigned as a result of a Securities Exchange Commission investigation. The SEC uncovered a decade of “of misstated earning reports resulted from the company's alleged culture of backdating stock options.” On June 21st of that year, Altera Corp. restated its 1996 through 2005 financial results.
 Even while Cerent’s video development team was struggling with their design, their key partner, Xilinx, joined the Fortune ranks of the “100 Best Companies to Work For” in 2001 in 14th position. The following year, Xilinx rose to sixth place, and by 2003, the company occupied the fourth spot. For Cerent-become-Cisco Xilinx remained a trusted partner in many of the companies DSP-FPGA designs.
 Pat feels, “It wasn’t really a bandwidth issue so much as a desire to maintain video quality.” He recalls suggesting to Cablevision that MPEG2 video over STS-3c be the way to go for the Cerent 454 video option. He was bullish on MPEG2 because, “MPEG2 defines not only a video and audio compression standard but also defines a transport mechanism (like SONET) that can carry multiple video and audio streams.” His suggestion would require the design of a board that managed the “multiplex” of existing compressed video/audio streams within an MPEG transport structure and pass that data stream over STS-3c. Pat said Cablevision’s lead member immediately shot it down. “He basically hated compressed digital video. But that was where the industry was heading. We ended up doing the IF-modulated video because that is what he wanted and [the Cerent 454 solution] could immediately fit into his network.” Pat adds, “The baseband audio and video option was thrown in to the design because it fit into the channel. I’m not sure that they actually wanted baseband. Video and audio compression were fairly new at this point in time. It would have been prohibitive for us to do the encoding and decoding within the ‘454.’”
 The Good Guys was a chain of consumer electronics retail stores with 71 stores in California, Nevada, Oregon, and Washington. In late 2003, the company was acquired by CompUSA, however, by November 2012, the CompUSA brand was dropped.
 “I can say that Altera makes a quality product,” Pat reflects. “I have had to provide engineering support for existing designs that used Altera FPGAs. Their parts and software work pretty good. [Back in the Cerent days], it was just a case of them be over-zealous in their desires to break into our company with a first sale.” Apparently a Xilinx insider leaked to Altera about Cerent working in parallel with Xilinx over the video filter design. Pat was told that, “the Altera saleswoman for the Cerent account got up in a sales meeting (that included their CEO) and proclaimed that she had broke into the Cerent account. This became huge news within Altera.” As time passed, however, “She was forced to reveal to the CEO that they had stumbled and now Altera was in competition with Xilinx. At this point, it became a grudge match for the CEO,” which, as Pat concludes, was “why the saleswoman was so pushy to me. She knew if they lost, it would reflect badly on her. But what got me was they really didn’t put much of an effort into beating Xilinx.”
 In Intel’s 2016 Annual Report, CEO Brian M. Krzanich wrote, “Intel reported record full-year revenue of $59.4 billion, up 7% from 2015 with the addition of Altera and strength across the business. The Data Center Group achieved record revenue and volume driven by continuing strong demand from cloud service providers, the ramp of new, adjacent products, and big gains in networking. Our Internet of Things Group also achieved record revenue and volume with impressive design wins in video, retail, and automotive. And, despite a decline in the PC market, the Client Computing Group grew revenue and profitability through strong execution, a robust segmentation strategy, a rich mix of Intel® CoreTM processors, and volume modem shipments . . . In 2016, we also reshaped the company in several important ways. We successfully integrated Altera (now Intel’s Programmable Solutions Group), which grew and delivered new products during integration . . .”